Press Releases

• July 16, 2008
  MHS Electronics Supports Tanner EDA with Foundry Design Kits

• March 7, 2008
  Tanner EDA boosts IC design productivity and verification capabilities with latest 13.0 release. Full Verilog-A LRM 2.2 compliance with T-Spice for analog system-level simulation and accurate 2D and 3D hierarchical parasitic layout extraction for verification.

• January 8, 2007
  Chip Designers Can Save Valuable Time With New Tanner Tools 12.2 For Analog And Mixed-Signal Design. Performance Upgrade, New Features Speed Design-To-Chip Process And Make Tools Easier To Use

• November 7, 2006
  Tanner EDA To Support ICED Users With Windows®-Based EDA Tools For Maximum Design Flexibility. Tanner Also Expands Asia Presence with New Office in Singapore

• July 24, 2006
  Tanner EDA to Demonstrate Seamless Integration and New Features for Analog and Mixed-Signal Tools at 43rd Design Automation Conference (DAC). Easy to Use Tanner Tools Pro 12.1 Offers Fast Start for End-to-End Design

• March 8, 2006
  Analog and Mixed-Signal Chip Design gets more Productive with Tanner EDA's New S-Edit Schematic Capture Tool

• February 6, 2006
  Tanner EDA Announces T-Spice Pro v11.2 Includes Support for the Penn State Philips (PSP) Model

• January 17, 2006
  Tanner Research Expands in Move to Monrovia Location