Tanner Tools for Parasitic Layout Extraction

HiPer PX is an accurate layout-to-circuit extractor for deep submicron MOS and bipolar circuits. It uses an efficient finite-element method to accurately extract interconnect resistances. Compact and accurate RC models for interconnects are generated that include higher-order moments and that are guaranteed to be accurate up to a user-defined signal frequency.

HiPer PX supports reduction of RC networks based on a user-specified time constant. This results in a minimal netlist which accurately models circuit performance up to the highest frequency the designer is concerned with.

Products

HiPer PX 2D Physical Extraction

• For fast and efficient boundary element estimation of parasitics
• Estimates parasitics based on pre-computed table of values.
• 2D parasitic extraction can be run hierarchically or flat.

HiPer PX 3D Physical Extraction

• Highly accurate extraction creates a full 3D model of the layout and extracts parasitics based on finite element analysis using the vertical spacing, thickness, and dielectric constant of the layers.