HOW DOES AN IC DESIGNER FIT COMPLEX, MIXED-SIGNAL IP INTO AN EVER SMALLER PACKAGE?
The landscape never stops changing for the engineers at Analog Bits. Their customers are running to keep ahead of the miniaturization curve, and they rely on Analog Bits for custom IP (intellectual property) that delivers high performance, high speed and low power in a small footprint.
Analog Bits designs fully customized, transistor-level IP components for integration into digital chips that its customers design on CMOS logic processes. Its products include precision clocking IP macros such as PLLs (Phase-Locked Loops) and DLLs (Delay Lock Loops), programmable interconnect solutions and I/Os, and specialized memories such as high-speed SRAMs and T-CAMs.
The ICs end up in applications which call for big improvements in power and performance from one generation to the next: computer graphics boards, gaming consoles, digital cameras, high-definition televisions, and the network search engines used in high-end routers and switches. These designs are in hundreds of millions of shipped units, in geometry ranging from 0.35µm to 40nm.
"These are not big chips with millions of gates, but they are very complex mixed-signal designs," explains Mahesh Tirupattur, executive vice president of Analog Bits. "There are some functions for which digital ICs need analog components, and so we are always going to need the most from an analog EDA tool in order to keep up with the demands of our customers' designs.
"We've found over the years that the Tanner tools evolve and keep pace with our needs in ways that other tools do not. They go far beyond applications like standard analog cells and commodity IP to meet our needs for high-speed clocking and memory."
-Mahesh Tirupattur
Executive Vice President
Analog Bits, Inc.
Knowing that its customers will soon want even higher performance in an even smaller footprint, Mahesh says that the company has 32nm designs on its roadmap, and that it plans to continue with Tanner tools in order to re-use the existing 40nm design blocks.
Analog Bits has grown from a single founder to a staff of 35, most of whom use Tanner tools. At this size, they have momentum and plenty of processes, but not all of the options of large design houses.
"From the perspective of a small company looking purely at productivity and engineering resources," continues Mahesh, "I don't need to have a CAD expert on staff if I have Tanner tools. I know we can get all the functionality in the world in a high-end tool suite, but for one thing, that would be very expensive, and for another, I would need in-house expertise on different types of programming on different UNIX servers, and I would need to worry about interoperability among operating systems.
"Strictly from the point of view of logistics and CAD, and for our design needs, Tanner tools are plug-and-play software on par with industry-leading layout tools. They have done a great job of introducing new features and supporting our users for a long time."
As a small company, Analog Bits has been careful to choose tools according to their fit with the company's processes.
Analog Bits has gotten the most out of the S-Edit and L-Edit tools, including designs for FPGAs and high-speed DTAMs used in network search engines; high-speed DLLs for LCD monitors and PC graphics cards; and low-power designs for devices like hearing aids and wireless headsets for mobile phones.
"We have plenty of technical reasons for staying with Tanner for all these years," conclude Mahesh, "and it also helps to do business with a company that's similar to ours in scale and focus. There has been a lot of consolidation among EDA tool vendors and Tanner manages to stay above the acquisition fray, which is reassuring to us."